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Side by Side Diff: libspeexdsp/resample_neon.h

Issue 1548: speexdsp: add initial check-asm for inner_product_*
Patch Set: Created 2 years, 1 month ago
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1 /* Copyright (C) 2007-2008 Jean-Marc Valin 1 /* Copyright (C) 2007-2008 Jean-Marc Valin
2 * Copyright (C) 2008 Thorvald Natvig 2 * Copyright (C) 2008 Thorvald Natvig
3 * Copyright (C) 2011 Texas Instruments 3 * Copyright (C) 2011 Texas Instruments
4 * author Jyri Sarha 4 * author Jyri Sarha
5 */ 5 */
6 /** 6 /**
7 @file resample_neon.h 7 @file resample_neon.h
8 @brief Resampler functions (NEON version) 8 @brief Resampler functions (NEON version)
9 */ 9 */
10 /* 10 /*
(...skipping 19 matching lines...) Expand all
30 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 30 CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
31 EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 31 EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
32 PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 32 PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
33 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 33 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
34 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 34 LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
35 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 35 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
36 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 36 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 */ 37 */
38 38
39 #include <arm_neon.h> 39 #include <arm_neon.h>
40
41 #if defined(CHECK_ASM)
42 #include "resample_checkasm.h"
43 #endif
40 44
41 #ifdef FIXED_POINT 45 #ifdef FIXED_POINT
42 #ifdef __thumb2__ 46 #ifdef __thumb2__
43 static inline int32_t saturate_32bit_to_16bit(int32_t a) { 47 static inline int32_t saturate_32bit_to_16bit(int32_t a) {
44 int32_t ret; 48 int32_t ret;
45 asm ("ssat %[ret], #16, %[a]" 49 asm ("ssat %[ret], #16, %[a]"
46 : [ret] "=&r" (ret) 50 : [ret] "=&r" (ret)
47 : [a] "r" (a) 51 : [a] "r" (a)
48 : ); 52 : );
49 return ret; 53 return ret;
(...skipping 10 matching lines...) Expand all
60 return ret; 64 return ret;
61 } 65 }
62 #endif 66 #endif
63 #undef WORD2INT 67 #undef WORD2INT
64 #define WORD2INT(x) (saturate_32bit_to_16bit(x)) 68 #define WORD2INT(x) (saturate_32bit_to_16bit(x))
65 69
66 #define OVERRIDE_INNER_PRODUCT_SINGLE 70 #define OVERRIDE_INNER_PRODUCT_SINGLE
67 /* Only works when len % 4 == 0 */ 71 /* Only works when len % 4 == 0 */
68 static inline int32_t inner_product_single(const int16_t *a, const int16_t *b, u nsigned int len) 72 static inline int32_t inner_product_single(const int16_t *a, const int16_t *b, u nsigned int len)
69 { 73 {
74 #if defined(CHECK_ASM)
75 int32_t expected;
76 #endif
70 int32_t ret; 77 int32_t ret;
71 uint32_t remainder = len % 16; 78 uint32_t remainder = len % 16;
72 len = len - remainder; 79 len = len - remainder;
73 80
74 asm volatile (" cmp %[len], #0\n" 81 asm volatile (" cmp %[len], #0\n"
75 " bne 1f\n" 82 " bne 1f\n"
76 " vld1.16 {d16}, [%[b]]!\n" 83 " vld1.16 {d16}, [%[b]]!\n"
77 " vld1.16 {d20}, [%[a]]!\n" 84 " vld1.16 {d20}, [%[a]]!\n"
78 " subs %[remainder], %[remainder], #4\n" 85 " subs %[remainder], %[remainder], #4\n"
79 " vmull.s16 q0, d16, d20\n" 86 " vmull.s16 q0, d16, d20\n"
(...skipping 32 matching lines...) Expand 10 before | Expand all | Expand 10 after
112 " vqmovn.s64 d0, q0\n" 119 " vqmovn.s64 d0, q0\n"
113 " vqrshrn.s32 d0, q0, #15\n" 120 " vqrshrn.s32 d0, q0, #15\n"
114 " vmov.s16 %[ret], d0[0]\n" 121 " vmov.s16 %[ret], d0[0]\n"
115 : [ret] "=&r" (ret), [a] "+r" (a), [b] "+r" (b), 122 : [ret] "=&r" (ret), [a] "+r" (a), [b] "+r" (b),
116 [len] "+r" (len), [remainder] "+r" (remainder) 123 [len] "+r" (len), [remainder] "+r" (remainder)
117 : 124 :
118 : "cc", "q0", 125 : "cc", "q0",
119 "d16", "d17", "d18", "d19", 126 "d16", "d17", "d18", "d19",
120 "d20", "d21", "d22", "d23"); 127 "d20", "d21", "d22", "d23");
121 128
129 #if defined(CHECK_ASM)
130 expected = 0;
131 RESAMPLE_CHECK_INNER_PRODUCT(a, b, len, ret, expected, "%d");
132 #endif
122 return ret; 133 return ret;
123 } 134 }
124 #elif defined(FLOATING_POINT) 135 #elif defined(FLOATING_POINT)
125 136
126 static inline int32_t saturate_float_to_16bit(float a) { 137 static inline int32_t saturate_float_to_16bit(float a) {
127 int32_t ret; 138 int32_t ret;
128 asm ("vmov.f32 d0[0], %[a]\n" 139 asm ("vmov.f32 d0[0], %[a]\n"
129 "vcvt.s32.f32 d0, d0, #15\n" 140 "vcvt.s32.f32 d0, d0, #15\n"
130 "vqrshrn.s32 d0, q0, #15\n" 141 "vqrshrn.s32 d0, q0, #15\n"
131 "vmov.s16 %[ret], d0[0]\n" 142 "vmov.s16 %[ret], d0[0]\n"
132 : [ret] "=&r" (ret) 143 : [ret] "=&r" (ret)
133 : [a] "r" (a) 144 : [a] "r" (a)
134 : "q0"); 145 : "q0");
135 return ret; 146 return ret;
136 } 147 }
137 #undef WORD2INT 148 #undef WORD2INT
138 #define WORD2INT(x) (saturate_float_to_16bit(x)) 149 #define WORD2INT(x) (saturate_float_to_16bit(x))
139 150
140 #define OVERRIDE_INNER_PRODUCT_SINGLE 151 #define OVERRIDE_INNER_PRODUCT_SINGLE
141 /* Only works when len % 4 == 0 */ 152 /* Only works when len % 4 == 0 */
142 static inline float inner_product_single(const float *a, const float *b, unsigne d int len) 153 static inline float inner_product_single(const float *a, const float *b, unsigne d int len)
143 { 154 {
144 float ret; 155 float ret;
156 #if defined(CHECK_ASM)
157 float expected;
158 #endif
145 uint32_t remainder = len % 16; 159 uint32_t remainder = len % 16;
146 len = len - remainder; 160 len = len - remainder;
147 161
148 asm volatile (" cmp %[len], #0\n" 162 asm volatile (" cmp %[len], #0\n"
149 " bne 1f\n" 163 " bne 1f\n"
150 " vld1.32 {q4}, [%[b]]!\n" 164 " vld1.32 {q4}, [%[b]]!\n"
151 " vld1.32 {q8}, [%[a]]!\n" 165 " vld1.32 {q8}, [%[a]]!\n"
152 " subs %[remainder], %[remainder], #4\n" 166 " subs %[remainder], %[remainder], #4\n"
153 " vmul.f32 q0, q4, q8\n" 167 " vmul.f32 q0, q4, q8\n"
154 " bne 4f\n" 168 " bne 4f\n"
(...skipping 34 matching lines...) Expand 10 before | Expand all | Expand 10 after
189 " bne 4b\n" 203 " bne 4b\n"
190 "5:" 204 "5:"
191 " vadd.f32 d0, d0, d1\n" 205 " vadd.f32 d0, d0, d1\n"
192 " vpadd.f32 d0, d0, d0\n" 206 " vpadd.f32 d0, d0, d0\n"
193 " vmov.f32 %[ret], d0[0]\n" 207 " vmov.f32 %[ret], d0[0]\n"
194 : [ret] "=&r" (ret), [a] "+r" (a), [b] "+r" (b), 208 : [ret] "=&r" (ret), [a] "+r" (a), [b] "+r" (b),
195 [len] "+l" (len), [remainder] "+l" (remainder) 209 [len] "+l" (len), [remainder] "+l" (remainder)
196 : 210 :
197 : "cc", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", "q8", 211 : "cc", "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", "q8",
198 "q9", "q10", "q11"); 212 "q9", "q10", "q11");
213 #if defined(CHECK_ASM)
214 expected = 0.0;
215 RESAMPLE_CHECK_INNER_PRODUCT(a, b, len, ret, expected, "%f");
216 #endif
199 return ret; 217 return ret;
200 } 218 }
201 #endif 219 #endif
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